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psradm (1)
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    NAME

    psradm - change processor operational
    status
     
    

    SYNOPSIS

    psradm -f | -i | -n | -s [-v] [-F] processor_id
    

    psradm -a -f | -i | -n | -s [-v] [-F]
    

     

    DESCRIPTION

    The psradm utility changes the operational status of processors. The legal states for the processor are on-line, off-line, spare, faulted, and no-intr.

    An on-line processor processes LWPs (lightweight processes) and can be interrupted by I/O devices in the system.

    An off-line processor does not process any LWPs. Usually, an off-line processor is not interruptible by I/O devices in the system. On some processors or under certain conditions, it might not be possible to disable interrupts for an off-line processor. Thus, the actual effect of being off-line might vary from machine to machine.

    A spare processor does not process any LWPs. A spare processor can be brought on-line, off-line or to no-intr by a privileged user of the system or by the kernel in response to changes in the system state.

    A faulted processor is identified by the kernel, which monitors the behavior of processors over time. A privileged user can set the state of a faulted processor to be on-line, off-line, spare or no-intr, but must use the force option to do so.

    A no-intr processor processes LWPs but is not interruptible by I/O devices.

    A processor can not be taken off-line or made spare if there are LWPs that are bound to the processor unless the additional -F option is used. The -F option removes processor bindings of such LWPs before changing the processor's operational status. On some architectures, it might not be possible to take certain processors off-line or spare if, for example, the system depends on some resource provided by the processor.

    At least one processor in the system must be able to process LWPs. At least one processor must also be able to be interrupted. Since an off-line or spare processor can be interruptible, it is possible to have an operational system with one processor no-intr and all other processors off-line or spare but with one or more accepting interrupts.

    If any of the specified processors are powered off, psradm might power on one or more processors.

    Only users with the PRIV_SYS_RES_CONFIG privilege can use the psradm utility.  

    OPTIONS

    The following options are supported:

    -a

    Perform the action on all processors, or as many as possible.

    -f

    Take the specified processors off-line.

    -F

    Force the transition to the additional specified state. Required if one or more of the specified processors was in the faulted state. Set the specified processors to faulted, if no other transition option was specified. Forced transitions can only be made to faulted, spare, or off-line states. Administrators are encouraged to use the -Q option for pbind(1M) to find out which threads will be affected by forced a processor state transition.

    -i

    Set the specified processors no-intr.

    -n

    Bring the specified processors on-line.

    -s

    Make the specified processors spare.

    -v

    Output a message giving the results of each attempted operation.

     

    OPERANDS

    The following operands are supported:

    processor_id

    The processor ID of the processor to be set on-line or off-line, spare, or no-intr.

    Specify processor_id as an individual processor number (for example, 3), multiple processor numbers separated by spaces (for example, 1 2 3), or a range of processor numbers (for example, 1-4). It is also possible to combine ranges and (individual or multiple) processor_ids (for example, 1-3 5 7-8 9).

     

    EXAMPLES

    Example 1 Setting Processors to off-line

    The following example sets processors 2 and 3 off-line:

    % psradm -f 2 3
    

    Example 2 Setting Processors to no-intr

    The following example sets processors 1 and 2 no-intr:

    % psradm -i 1 2
    

    Example 3 Setting Processors to spare

    The following example sets processors 1 and 2 spare, even if either of the processors was in the faulted state:

    % psradm -F -s 1 2
    

    Example 4 Setting All Processors on-line

    % psradm -a -n
    

    Example 5 Forcing Processors to off-line

    The following example sets processors 1 and 2 offline, and revokes the processor bindings from the processes bound to them:

    % psradm -F -f 1 2
    

     

    EXIT STATUS

    The following exit values are returned:

    0

    Successful completion.

    >0

    An error occurred.

     

    FILES

    /etc/wtmpx

    Records logging processor status changes

     

    ATTRIBUTES

    See attributes(5) for descriptions of the following attributes:

    ATTRIBUTE TYPEATTRIBUTE VALUE

    AvailabilitySUNWcsu

     

    SEE ALSO

    pbind(1M), psrinfo(1M), psrset(1M), p_online(2), processor_bind(2), attributes(5)  

    DIAGNOSTICS

    psradm: processor 4: Invalid argument

    The specified processor does not exist in the configuration.

    psradm: processor 3: Device busy

    The specified processor could not be taken off-line because it either has LWPs bound to it, is the last on-line processor in the system, or is needed by the system because it provides some essential service.

    psradm: processor 3: Device busy

    The specified processor could not be set no-intr because it is the last interruptible processor in the system, or or it is the only processor in the system that can service interrupts needed by the system.

    psradm: processor 3: Device busy

    The specified processor is powered off, and it cannot be powered on because some platform-specific resource is unavailable.

    psradm: processor 0: Not owner

    The user does not have permission to change processor status.

    psradm: processor 2: Operation not supported

    The specified processor is powered off, and the platform does not support power on of individual processors.


     

    Index

    NAME
    SYNOPSIS
    DESCRIPTION
    OPTIONS
    OPERANDS
    EXAMPLES
    EXIT STATUS
    FILES
    ATTRIBUTES
    SEE ALSO
    DIAGNOSTICS


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